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聚四氟乙烯缓冲膜在加压烧结键合中的压力平衡效应
The Pressure Balance Effect of the Polytetrafluoroethylene Buffer Film in Pressure-Assisted Sintering Bonding
| 作者 | Chenxiao Huang · Guisheng Zou · Shuaiqi Wang · Zehua Li · Guoqiang Qi · Lei Liu |
| 期刊 | IEEE Transactions on Components, Packaging and Manufacturing Technology |
| 出版日期 | 2025年7月 |
| 技术分类 | 储能系统技术 |
| 技术标签 | 储能系统 SiC器件 |
| 相关度评分 | ★★★★★ 5.0 / 5.0 |
| 关键词 | 碳化硅功率芯片 缓冲膜 压力平衡 聚四氟乙烯 烧结键合 |
语言:
中文摘要
键合压力是碳化硅(SiC)功率芯片压力辅助烧结键合中最重要的工艺参数之一。置于压力压头与芯片之间的缓冲膜对于多芯片同时键合时的压力平衡至关重要。然而,关于缓冲膜的压力平衡机制、优化及性能提升的研究却鲜有报道。本研究建立了聚四氟乙烯(PTFE)缓冲膜压力平衡效应的仿真模型,并通过实验结果进行了验证。在压缩比和接头孔隙率方面,仿真结果与实验结果的平均相对误差(MRE)分别仅为 1.06% 和 1.98%。首次发现缓冲膜的压力平衡能力在某一最佳压力下达到峰值。无论膜厚如何,该最佳压力值均与烧结温度呈负相关。为提高缓冲膜在较低压力下的压力平衡效果,提出了打孔缓冲膜以增强 PTFE 膜的压力平衡能力。使用打孔膜后,高度差为 60μm 的两个芯片之间的接头孔隙率差异降低了 44%。不同去除率的膜组合使用可进一步消除特定高度差的影响。本研究有望加深对缓冲膜压力平衡机制的理解,为低成本、低压烧结键合技术的发展奠定基础。
English Abstract
Bonding pressure is one of the most important process parameters in pressure-assisted sintering bonding of the SiC power chips. The buffer film, placed between the pressure indenter and the chips, is essential to balance the pressure during the simultaneous bonding of multiple chips. However, the pressure balance mechanism, optimization, and enhancement of the buffer film have been rarely studied. In this study, a simulation model for the pressure balance effect of the polytetrafluoroethylene (PTFE) buffer film was established and verified by experimental results. The mean relative error (MRE) between the simulation and experimental results was merely 1.06% and 1.98%, regarding to the compression ratio and porosity of the joint. It was found that the pressure balance ability peaked at an optimal pressure for the first time. The optimal pressure value was negatively correlated with the sintering temperature regardless of the film thickness. To improve the pressure balance effect at lower pressure, drilled buffer films were proposed to enhance the pressure balance ability of the PTFE film. With a drilled film, the joint porosity difference between two chips with a 60- m-height difference was reduced by 44%. The combination of films with different removal rates could further eliminate the influence of a specific height difference. This work is promising to deepen the understanding of the pressure balance mechanisms of the buffer film and pave the way for low-cost and low-pressure sintering bonding.
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SunView 深度解读
从阳光电源功率半导体封装技术发展角度看,这项关于PTFE缓冲膜压力平衡效应的研究具有重要的工程应用价值。SiC功率芯片是我司光伏逆变器和储能变流器实现高效率、高功率密度的核心器件,而压力辅助烧结键合技术正是SiC芯片封装的关键工艺,直接影响产品的可靠性和成本竞争力。
该研究的核心价值在于解决多芯片同时键合时的压力均衡难题。通过建立PTFE缓冲膜的仿真模型,研究揭示了最优压力与烧结温度的负相关规律,这为我司优化封装工艺参数提供了理论依据。特别是针对芯片高度差异问题,提出的钻孔缓冲膜方案可将60微米高度差导致的孔隙率差异降低44%,这对提升多芯片并联模块的一致性至关重要,直接关系到逆变器和储能系统的长期可靠性。
从技术成熟度评估,该研究已完成仿真与实验验证(误差仅1-2%),具备较高的工程化可行性。低压力烧结的技术路线符合我司降本增效的战略方向,可降低设备投资和工艺复杂度。然而,实际应用仍面临挑战:不同批次芯片的高度一致性控制、钻孔膜的标准化设计、以及与现有产线的兼容性都需要深入验证。
建议我司功率器件封装团队关注该技术方向,可考虑与研究机构合作开展定制化缓冲膜的开发,特别是针对1200V/1700V SiC模块的多芯片封装场景。这项技术的突破有望提升我司在高可靠性功率模块领域的竞争优势,支撑新一代高功率密度产品的开发。