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PCB寄生电容对采用TO-247封装SiC器件的斩波与半桥电路开关瞬态的影响
Impact of PCB Parasitic Capacitance on Switching Transients in Chopper and Half-Bridge Configurations Utilizing TO-247 SiC Devices
| 作者 | Abdul Basit Mirza · Andrew Castiblanco · Abdul Muneeb · Yang Xie · Sama Salehi Vala · Fang Luo |
| 期刊 | IEEE Transactions on Industry Applications |
| 出版日期 | 2025年3月 |
| 技术分类 | 电动汽车驱动 |
| 技术标签 | SiC器件 |
| 相关度评分 | ★★★★ 4.0 / 5.0 |
| 关键词 | 碳化硅器件 斩波与半桥配置 PCB电容 开关瞬态 小信号模型 |
语言:
中文摘要
采用TO - 247封装的碳化硅(SiC)金属氧化物半导体场效应晶体管(MOSFET)和肖特基二极管是斩波器(降压/升压)和半桥电路配置的经济选择,而斩波器和半桥电路是各种功率变换器拓扑的基本组成部分。然而,碳化硅器件的快速开关意味着较高的 $\text{d}\boldsymbol{v}/\text{d}\boldsymbol{t}$ 和 $\text{d}\boldsymbol{i}/\text{d}\boldsymbol{t}$,这对功率回路电感的印刷电路板(PCB)部分提出了限制,以在关断瞬态期间将电压过冲降至最低。尽管垂直PCB功率回路布局能有效降低PCB回路电感,但会增加PCB寄生电容。由于TO - 247封装具有相当大的引脚电感,该PCB电容会通过封装引脚电感与器件的输出电容并联,从而改变开关瞬态。本文分析了采用TO - 247封装的碳化硅器件在斩波器和半桥电路配置中,PCB电容对关断开关瞬态和振铃的影响。首先,推导了包含PCB电容的小信号模型。随后,在频域中验证了这些模型,并通过对两个布局相同但层叠结构不同(从而PCB电容不同)的PCB原型进行双脉冲测试(DPT)来比较开关瞬态。此外,还对所提出的模型与PCB和器件输出电容直接并联近似模型进行了对比研究。最后,对所提出的小信号模型进行分析,以TO - 247引脚电感和PCB回路电感为参数确定标准,从而将PCB电容对开关瞬态的影响降至最低。
English Abstract
Silicon Carbide (SiC) MOSFETs and Schottky diodes in the TO-247 package are economical options for chopper (buck/boost) and half-bridge configurations, which are fundamental building blocks for various power converter topologies. However, the fast switching of SiC implies high d/d and d/d , imposing a constraint on the PCB portion of power loop inductance in minimizing voltage overshoot during the turn-OFF transient. Although the vertical PCB power loop layout effectively reduces the PCB loop inductance, it increases the PCB parasitic capacitance. Due to the considerable lead inductance of the TO-247 package, this PCB capacitance is paralleled to the device's output capacitance through the package lead inductance, altering the switching transient. This article analyzes the effect of PCB capacitance on turn-OFF switching transient and ringing in chopper and half-bridge configurations with SiC devices in the TO-247 package. Initially, small-signal models incorporating PCB capacitance are derived. Subsequently, these models are validated in the frequency domain, and the switching transients are compared through double pulse test (DPT) on two PCB prototypes with the same layout but different stack-ups, yielding different PCB capacitances. Further, a comparative study of the proposed models with direct parallel approximation of PCB and device output capacitance is presented. Finally, the proposed small-signal models are analyzed to establish criteria, in terms of TO-247 lead and PCB loop inductance, for minimizing the impact of PCB capacitance on switching transients.
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SunView 深度解读
该PCB寄生电容优化技术对阳光电源SiC器件应用具有重要价值。在ST系列储能变流器和SG系列光伏逆变器中,TO-247封装SiC MOSFET已广泛应用于三电平拓扑和半桥电路。研究揭示的PCB布局优化方法可直接应用于功率模块设计,通过减小关键路径寄生电容降低电压过冲和EMI,提升系统在高频开关下的可靠性。对于车载OBC和充电桩产品,该技术可改善动态均压性能,支持更高功率密度和效率目标。研究为PowerTitan等大型储能系统的紧凑化设计提供了PCB层级的精细化优化依据,助力实现更低开关损耗和更优电磁兼容性能。