面向高功率与高开关速度功率半导体封装的低频寄生电感客观表征方法

Characterizing package parasitic inductance is significant for package design, dynamic characteristic evaluation, thermal management, and insulation breakdown protection. As package parasitic inductances become smaller and the switching speed of the power semiconductor becomes higher, traditional and widely-used double pulse tests based on the “$L = V/({di/dt})$” and “$L = {\rm{ }}1/({4{\pi }^2{f}...