栅极电压凹陷作为碳化硅MOSFET在线健康监测的新指标

Due to the poor quality of the silicon carbide / silicon dioxide interface realization and their thin gate oxide layer, SiC mosfets are more susceptible to charge-trapping mechanisms than silicon mosfets. These phenomena are amplified over time, resulting in decreased transistor performance and increased losses. To monitor this aging mechanism, an analog method is proposed to extract a newly discovered health indicator from the gate voltage (VGS) waveform. This is accomplished by slowing down a specific turn-on using a dual-channel active gate driver. The online health monitoring method is then experimentally validated on a 1200 V-36 A SiC mosfet in both no-load and pulsewidth modulation conditions.