多芯片SiC功率模块寄生参数提取与优化的电流集束概念

Parasitic inductance reduction is increasingly vital for the SiC power module in high-frequency and high-capacity applications. To address the parasitic issue, the automatic layout design offers the potential to pursue the optimal configuration of the power packaging. However, the efficient and accurate parasitic extraction of the packaging is the bottleneck of the automatic design scenario. In th...