基于双相和三相移调制技术的交错并联CLLC变换器最优电流平衡

Interleaved CLLC converters offer high power density and improved thermal performance, but achieving balanced currents between cells remains challenging in the presence of component mismatches. This paper introduces the first application of Dual-Phase Shift Modulation (DPSM) and Triple-Phase Shift Modulation (TPSM) to dual-phase interleaved CLLC converters. The goal is to achieve effective current balancing, high efficiency, and Zero-Voltage Switching (ZVS) across a wide load range. Analytical expressions for resonant currents are derived using harmonic approximation techniques, considering the influence of phase-shift parameters and passive component mismatches. A condition is introduced to prevent reverse power flow in either power cell, and ZVS boundaries are identified for all switches. An optimization framework is proposed for selecting phase-shift values that satisfy ZVS, positive power transfer, and minimum RMS current simultaneously. Experimental results from a 2 kW interleaved CLLC prototype validate the theoretical findings, demonstrating the superior performance of TPSM over DPSM in terms of current balancing, circulating current reduction, and efficiency, particularly under mismatch conditions.