多兆赫多千瓦碳化硅全桥逆变器零电压开通挑战及面向高功率电容式电力传输系统的设计

This article investigates the challenges in designing and implementing silicon carbide (SiC) full-bridge inverters that operate at multi-MHz multi-kW, aiming at exciting high-power capacitive power transfer (CPT) systems. There are three contributions. First, this article reveals the drain-source current and voltage oscillations of a zero-voltage-switched-on full-bridge inverter caused by the large hard switching-off current of MOSFET when working at multi-MHz and multi-kW, which emerges as the main challenge that limits the further increase of the switching frequency. Second, a methodology to enhance the high-frequency switching of a full-bridge inverter is explicated in terms of switching device selection, gate-driving circuit design, zero-voltage-switching (ZVS) realization, and inverter layout optimization. Three inverter examples are, respectively, implemented based on three commercial gate driver chips, UCC5390, IXRFD631, and UCC27531D with SiC MOSFET C3M0060065K. The implemented inverters can work from 1 MHz at 6.59 kW to 5 MHz at 1.09 kW, which creates new power and frequency records of a SiC full-bridge inverter and points out the ZVS switching limit of 3.5 MHz. Third, an impressive 3-MHz 4.34-kW CPT system is constructed based on the implemented inverters, which achieves a dc-dc efficiency of 94.14% at a distance of 120 mm, validating the proposed multi-MHz and multi-kW SiC full-bridge inverter design and boosting the development of CPT technology.