基于同质单层WSe₂沟道与极性调控的低功耗CMOS反相器

While performance metrics of innovative technology-nodes continue to improve rapidly, energy efficiency has not kept pace. In this work, we successfully constructed a homogeneous CMOS inverter using monolayer tungsten diselenide (WSe2, a promising candidate can maintain good mobility at atomic-level thickness and offers better resistance to short-channel effects. Through different contact engineering and passivation doping approaches, the polarity of WSe2 could be effectively tailored. These module improvements are helpful to investigate the impact on threshold voltage of several critical process steps and match performance of both n and p-type field-effect transistors with low effective oxide thickness back-gate dielectrics in enhancement-mode operation. In addition, the inverters demonstrate superior performance at a relevant supply voltage (VDD) of 1.5 V: voltage gain exceeding 10 V/V, noise margin over 80%, picowatt-range static-power consumption, and near-ideal switching voltage of half-VDD. Reaching these numbers simultaneously opens up the possibilities for future-generation applications of two-dimensional material-based electronic components.