一种具有最少开关器件的高效多电平逆变器拓扑结构，用于提升电能质量并降低损耗

In this article, the authors introduced a novel MLI topology in symmetric and asymmetric configurations aiming to attain fewer power electronic devices for synthesizing more steps in the load voltage in contrast with conventional topologies. The proposed topology uses minimal on-state switching devices leading to a diminution of power loss and voltage drop. The suggested topology is optimized for a fewer number of power devices, input DC supply, and auxiliary gate drivers for a maximum number of steps in the load voltage. The suggested topology has been verified in SIMULINK and the laboratory prototype is constructed in line with the simulated response to demonstrate its performance suitable for real-time applications.