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基于dq轴级联延迟信号消除的锁相环:分析、设计及与基于移动平均滤波器的锁相环比较

dq-Frame Cascaded Delayed Signal Cancellation- Based PLL: Analysis, Design, and Comparison With Moving Average Filter-Based PLL

语言:

中文摘要

为提升电网异常工况下锁相环(PLL)的性能,本文研究了环路内与环路前置滤波技术。文章提出了一种基于级联延迟信号消除(CDSC)的dq轴锁相环,通过对比移动平均滤波器(MAF)型PLL,分析了其在复杂电网环境下的动态响应与滤波性能,旨在优化并网控制的稳定性与精度。

English Abstract

To improve the performance of phase-locked loops (PLLs) under adverse grid conditions, incorporating different filtering techniques into their structures have been proposed in the literature. These filtering techniques can be broadly classified into in-loop and preloop filtering techniques depending on their position in the PLL structure. Inspired from the concept of delayed signal cancellation (D...
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SunView 深度解读

该技术对阳光电源的核心业务至关重要。在弱电网环境下,电网电压畸变和不平衡会严重影响光伏逆变器(如组串式/集中式)及储能变流器(PowerTitan/PowerStack)的并网稳定性。CDSC-PLL相比传统MAF-PLL具有更快的动态响应速度和更强的谐波抑制能力,能显著提升产品在复杂电网下的低电压穿越(LVRT)性能和抗扰动能力。建议研发团队将其集成至iSolarCloud智能运维平台支持的固件算法中,以增强产品在弱电网场景下的并网适应性,提升系统可靠性。