降低共模电压与环流的双并联三电平逆变器集成调制策略

Many reduced common mode voltage (CMV) modulation methods have been proposed for three-level inverters. However, most of them suffer from large current distortion because only part of the available base vectors is utilized. The interleaved paralleling can reduce both CMV and the output current distortion, though the CMV reduction is limited and large zero-sequence circulating current (ZSCC) is ine...